Z Microsystems ZX3 Bedienungsanleitung PDF herunterladen (Seite 34)

34 Altera Corporation

MAX 9000 Programmable Logic Device Family Data Sheet

Table 23. IOC Delays

Symbol Parameter Conditions Speed Grade Unit

-10 -15 -20

MinMaxMinMaxMinMax

IODR

I/O row output data delay 0.2 0.2 1.5 ns

IODC

I/O column output data delay 0.4 0.2 1.5 ns

IOC

I/O control delay (6) 0.5 1.0 2.0 ns

IORD

I/O register clock-to-output

delay

0.6 1.0 1.5 ns

IOCOMB

I/O combinatorial delay 0.2 1.0 1.5 ns

IOSU

I/O register setup time before

clock

2.0 4.0 5.0 ns

IOH

I/O register hold time after

clock

1.0 1.0 1.0 ns

IOCLR

I/O register clear delay 1.5 3.0 3.0 ns

IOFD

I/O register feedback delay 0.0 0.0 0.5 ns

INREG

I/O input pad and buffer to I/O

3.5 4.5 5.5 ns

INCOMB

I/O input pad and buffer to row

and column delay

1.5 2.0 2.5 ns

OD1

Output buffer and pad delay,

Slow slew rate = off,

CCIO

= 5.0 V

C1 = 35 pF 1.8 2.5 2.5 ns

OD2

Output buffer and pad delay,

Slow slew rate = off,

CCIO

= 3.3 V

C1 = 35 pF 2.3 3.5 3.5 ns

OD3

Output buffer and pad delay,

Slow slew rate = on,

CCIO

= 5.0 V or 3.3 V

C1 = 35 pF 8.3 10.0 10.5 ns

Output buffer disable delay C1 = 5 pF 2.5 2.5 2.5 ns

ZX1

Output buffer enable delay,

Slow slew rate = off,

CCIO

= 5.0 V

C1 = 35 pF 2.5 2.5 2.5 ns

ZX2

Output buffer enable delay,

Slow slew rate = off,

CCIO

= 3.3 V

C1 = 35 pF 3.0 3.5 3.5 ns

ZX3

Output buffer enable delay,

Slow slew rate = on,

CCIO

= 3.3 V or 5.0 V

C1 = 35 pF 9.0 10.0 10.5 ns

1 2 ... 29 30 31 32 33 34 35 36 37 38 39 ... 45 46

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